Marvell Launches Chips to Accelerate AI Infrastructure, Aims for Massive Revenue
Marvell Technology unveiled its second-generation Structera X memory expanders and new 3-nanometer connectivity chips, designed to overcome memory and connection bottlenecks in artificial intelligence processors.
ByAndreea Blidar4 min read

Marvell Technology, a key player in designing chips for artificial intelligence infrastructure, has revealed significant innovations. The company announced the second generation of its Structera X memory expanders and new 3-nanometer connectivity chips, aiming to solve critical problems that limit the performance of AI systems. These launches were made public at the Open Compute Project Global Summit in San Jose from October 12 to 15, just as the semiconductor sector was experiencing a tough week, as reported by The Motley Fool.
Overcoming AI Memory Limitations
One of the biggest challenges in artificial intelligence is the “memory wall,” a problem that arises when graphics processing units (GPUs) run out of memory before exhausting their computational capacity. This is especially true with increasingly larger AI models and longer context windows.
This is where Marvell's second-generation Structera X comes in. These chips allow adding up to 6 terabytes of standard DDR5 memory to a server, sharing it across four hosts, and compressing it on the fly. According to the company, this technology can cut the time to first “token” (the first part of an AI response) by 40% to 50%. The first generation Structera X is already shipping to hyperscalers, and Meta Platforms, for example, has praised this technology, as mentioned by The Motley Fool. Test models of the second generation will be available in Q1 2027.
Faster, More Efficient Connectivity for Data Centers
Beyond memory, connectivity is another significant bottleneck for AI systems. Marvell introduced two new 3-nanometer connectivity chips. One is a 3.2-terabit retimer, and the other is an active electrical cable chip that doubles copper reach to more than six meters between AI servers and switches.
Both support UALink, an open standard that enables communication between non-Nvidia accelerators. In plain terms, these advancements allow racks of accelerators to talk to each other over longer, cheaper copper cables without the signal falling apart. Early samples of both chips are already available for potential customers, according to The Motley Fool.
An Ambitious Future Growth Plan
These announcements come at a time when Marvell has high growth expectations. At its first investor day in years, on October 6, the company's management set an ambitious target: to achieve revenues between $70 billion and $90 billion by its fiscal year 2031. This represents a significant jump from the $8.2 billion recorded in fiscal year 2026.
The company expects this growth to come primarily from what they call “XPU attach”: the networking, memory, and security chips that are needed alongside every custom accelerator designed by cloud providers. Although the goal implies 55% to 60% annualized growth over five years, which warrants a close look, Marvell's current stock value could be attractive even if growth is half of what's projected, according to The Motley Fool.
One point to consider is that Nvidia, a giant in the GPU sector, invested $2 billion in Marvell preferred stock in March, a sign of confidence in the company's direction. We had previously reported on Marvell's interest in AI in this note.
Why it matters
The AI semiconductor sector is volatile, as seen in the recent drop of over 11% in the Philadelphia Semiconductor index. However, Marvell's advancements in overcoming technical bottlenecks for AI memory and connectivity are crucial. By offering concrete solutions to make AI systems more powerful and efficient, the company positions itself to play a significant role in the development of AI infrastructure in the coming years, regardless of short-term market fluctuations.
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TopicsMarvell TechnologyAI chipssemiconductorsAI infrastructuretechnology


